A number of circuits have been developed for the purpose of driving a serial data bus without distorting the data contained in the logic input signals while eliminating high frequency noise components associated with the substantially instantaneous rise and fall times of the leading and trailing edges of the logic signals. One such circuit is disclosed in the patent to Neidorff et al U.S. Pat. No. 4,593,206. The patented circuit provides symmetrical rising and falling edges which have a predetermined slope. This circuit does not meet the stringent requirement of noise reduction, ground offset and propagation delay of anticipated motor vehicle communication buses.